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Publications by Yogeesh K.V.
Design of Booth Multiplier Using Double Gate MOSFET
International Journal of Computer Applications
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A New Design of Multiplier Using Modified Booth Algorithm and Reversible Gate Logic
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FPGA Implementation of Low Power Booth Multiplier Using Radix-4 Algorithm
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Comparative Analysis of Low Power 10T and 14T Full Adder Using Double Gate MOSFET at 45nm Technology
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