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Publications by C. Chung-Ping Chen
Process-Variation Robust and Low-Power Zero-Skew Buffered Clock-Tree Synthesis Using Projected Scan-Line Sampling
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Low-Power Clock Tree Synthesis for 3d-ICs
ACM Transactions on Design Automation of Electronic Systems
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Computer-Aided Design
Double-Tree Scan: A Novel Low-Power Scan-Path Architecture
Optimized Low Voltage Low Power Dynamic Comparator Robust to Process, Voltage and Temperature Variation
Indonesian Journal of Electrical Engineering and Computer Science
Control
Electronic Engineering
Information Systems
Signal Processing
Computer Networks
Hardware
Communications
Optimization
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Architecture
Transition Time Bounded Low-Power Clock Tree Construction
Optimal Useful Clock Skew Scheduling in the Presence of Variations Using Robust ILP Formulations
IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
Computer Science Applications
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Analysis of the Impact of Process Variations on Clock Skew
IEEE Transactions on Semiconductor Manufacturing
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Condensed Matter Physics
Manufacturing Engineering
Optical
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Magnetic Materials
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Analysis of Clock Trees for Optimization Through Multi Point Clock Tree Synthesis
International Journal of Recent Technology and Engineering
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Management of Technology
Innovation
Clock Tree Synthesis With Data-Path Sensitivity Matching
The Associative-Skew Clock Routing Problem
