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Publications by Henry Selvaraj
Energy Characteristic of a Processor Allocator and a Network-On-Chip
International Journal of Applied Mathematics and Computer Science
Engineering
Computer Science
Applied Mathematics
Related publications
Switch Allocator for Bufferless Network-On-Chip Routers
A Parallelized Implementation of Turbo Decoding Based on Network on Chip Multi - Core Processor
Journal of Engineering Science and Technology Review
Engineering
Aegis: A Single-Chip Secure Processor
IEEE Design & Test of Computers
A Technique for Low Energy Mapping and Routing in Network-On-Chip Architectures
Long-Range Dependence and On-Chip Processor Traffic
Microprocessors and Microsystems
Computer Networks
Hardware
Communications
Architecture
Artificial Intelligence
Software
Analysis of a Tandem Network Model of a Single-Router Network-On-Chip
Annals of Operations Research
Management Science
Decision Sciences
Operations Research
A Complete Network-On-Chip Emulation Framework
Scheduling Multiple Divisible Loads on a Linear Processor Network
Fault Diagnosis and Reconfiguration Method for Network-On-Chip Based Multiple Processor Systems With Restricted Private Memories
IEICE Transactions on Information and Systems
Electronic Engineering
Pattern Recognition
Hardware
Computer Vision
Electrical
Architecture
Artificial Intelligence
Software
