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Publications by Kanika Kaur

CMOS Low Power Cell Library for Digital Design

International Journal of VLSI Design & Communication Systems
2013English

Related publications

Variable Supply-Voltage Scheme for Low-Power High-Speed CMOS Digital Design

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Electronic EngineeringElectrical
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Design and Analysis of Low Power Analog to Digital Converter Using CMOS Technology

IARJSET
2017English

Low Power CMOS LNA and Mixer Design

IOSR Journal of Electronics and Communication Engineering
2012English

CMOS VLSI Design of Low Power Comparator Logic Circuits

Asian Journal of Scientific Research
Multidisciplinary
2014English

Design of a Low-Power CMOS Operational Amplifier With Common-Mode Feedback for Pipeline Analog-To-Digital Converter Applications

Turkish Journal of Electrical Engineering and Computer Sciences
Electronic EngineeringElectricalComputer Science
2017English

Design of Low Power SAR ADC for ECG Using 45nm CMOS Technology

International Journal of VLSI Design & Communication Systems
2017English

A Low Power CMOS Analog Circuit Design for Acquiring Multichannel EEG Signals

International Journal of VLSI Design & Communication Systems
2015English

Design a Low Power Half-Subtractor Using .90µm CMOS Technology

IOSR journal of VLSI and Signal Processing
2013English

Low-Power Design of Adiabatic Dynamic CMOS Logic Using Parasitic Capacitance of 0.18μm Standard CMOS Model

2017English

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