Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by Peter Celinski
Low-Power High-Speed Threshold Logic and Its Application to the Design of Novel Carry Lookahead Adders
Related publications
FPGA Implementation of a High Speed Multiplier Employing Carry Lookahead Adders in Reduction Phase
International Journal of Computer Applications
Comparative Analysis of High Speed Carry Skip Adders
International Journal of Engineering and Technology(UAE)
Architecture
Hardware
Engineering
Chemical Engineering
Biotechnology
Environmental Engineering
Computer Science
Low Power High Speed SQRT Carry Select Adder
IOSR journal of VLSI and Signal Processing
Limited Switch Dynamic Logic Circuits for High-Speed Low-Power Circuit Design
IBM Journal of Research and Development
Computer Science
Two Operand Binary Adders With Threshold Logic
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
Evaluation of High Speed and Low Memory Parallel Prefix Adders
IOSR Journal of Electrical and Electronics Engineering
Study of Design and Analysis of Low-Power 10-Transistor Full Adders Using Novel XOR–XNOR Gates
IOSR journal of VLSI and Signal Processing
Design of Low Power High Performance 32 Bit Alu Using Different Adders in 45nm Technology
International Journal of Advance Engineering and Research Development
Design Issues in Low-Voltage High-Speed Current-Mode Logic Buffers
