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Publications by Pietro Fezzardi
Using Efficient Path Profiling to Optimize Memory Consumption of On-Chip Debugging for High-Level Synthesis
Transactions on Embedded Computing Systems
Hardware
Architecture
Software
Software Defined Architectures for Data Analytics
Related publications
Design of On-Chip Testing Memory for High Speed Circuits
CVR Journal of Science & Technology
Minimizing Power Consumption of Spatial Division Based Networks-On-Chip Using Multi-Path and Frequency Reduction
High-Level Debugging and Verification for FPGA-Based Multicore Architectures
OPERON: Optical-Electrical Power-Efficient Route Synthesis for On-Chip Signals
Secure and Flexible Trace-Based Debugging of Systems-On-Chip
ACM Transactions on Design Automation of Electronic Systems
Computer Science Applications
Electronic Engineering
Computer Graphics
Electrical
Computer-Aided Design
Stacked FSMD: A Power Efficient Micro-Architecture for High Level Synthesis
Dependability Evaluation of COTS Microprocessors via On-Chip Debugging Facilities
Data Reuse Driven Memory and Network-On-Chip Co-Synthesis
A Mechanism for Efficient Debugging of Parallel Programs
