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Publications by Prof. Mayuri Chawla
Design of Cache Memory With Cache Controller for Low Power
Related publications
An Adaptive Various-Width Data Cache for Low Power Design
IEICE Transactions on Information and Systems
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A VLSI Design for an Efficient Multiprocessor Cache Memory
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An Efficient Cache Design for Scalable Glueless Shared-Memory Multiprocessors
Memory Access Pattern Analysis and Stream Cache Design for Multimedia Applications
Cache Miss Clustering for Banked Memory Systems
IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
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Reducing Cache Power With Low-Cost, Multi-Bit Error-Correcting Codes
ACM SIGARCH Computer Architecture News
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Cache Decay: Exploiting Generational Behavior to Reduce Cache Leakage Power
Cache Miss Clustering for Banked Memory Systems
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