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Publications by Rutuparna Tamhankar
Timing-Error-Tolerant Network-On-Chip Design Methodology
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Related publications
Design Methodology for Robust and Fault-Tolerant Control of a Microprehensile Microrobot-On-Chip
IFAC Proceedings Volumes
Self-Calibrating Source Synchronous Communication for Delay Variation Tolerant GALS Network-On-Chip Design
International Journal of Embedded and Real-Time Communication Systems
Computer Science
Layout Optimization Methodology for Ring-Based On-Chip Optical Network
IEICE Electronics Express
Electronic Engineering
Condensed Matter Physics
Optical
Electrical
Magnetic Materials
Electronic
Fpga Based Highly Reliable Fault Tolerant Approach for Network on Chip(noc)
International Journal of Research in Engineering and Technology
Exploiting Soft Redundancy for Error-Resilient On-Chip Memory Design
IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
Computer Science Applications
Computer Graphics
Computer-Aided Design
Software
An Application-Specific Design Methodology for On-Chip Crossbar Generation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Exploiting Soft Redundancy for Error-Resilient On-Chip Memory Design
IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
Computer Science Applications
Computer Graphics
Computer-Aided Design
Software
Formal Analysis of a Fault-Tolerant Routing Algorithm for a Network-On-Chip
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
Low-Cost Adaptive and Fault-Tolerant Routing Method for 2D Network-On-Chip
IEICE Transactions on Information and Systems
Electronic Engineering
Pattern Recognition
Hardware
Computer Vision
Electrical
Architecture
Artificial Intelligence
Software
