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Publications by Yesung Kang
Channel Length Biasing for Improving Read Margin of the 8T SRAM at Near Threshold Operation
Electronics (Switzerland)
Control
Electronic Engineering
Signal Processing
Computer Networks
Systems Engineering
Hardware
Communications
Electrical
Architecture
Related publications
Analysis of 8T SRAM Cell at Various Process Corners at 65 Nm Process Technology
Circuits and Systems
Impact of Gate-Length Biasing on Threshold-Voltage Selection
Design of 8T CNTFET SRAM for Ultra-Low Power Microelectronic Applications
International Journal of Recent Technology and Engineering
Engineering
Management of Technology
Innovation
A Comparative Study of 6T and 8T SRAM Cell With Improved Read and Write Margins in 130 Nm CMOS Technology
WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS
A 65nm 8T Sub-Vt SRAM Employing Sense-Amplifier Redundancy
Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Electronic Engineering
Optical
Electrical
Magnetic Materials
Electronic
Leakage Immune Modified Pass Transistor Based 8T SRAM Cell in Subthreshold Region
International Journal of Reconfigurable Computing
Hardware
Architecture
Stability Analysis of Sub-Threshold 6T SRAM Cell at 45 Nm for IoT Application
International Journal of Recent Technology and Engineering
Engineering
Management of Technology
Innovation
Comparative Analysis of 6T, 7T, 8T, 9T, and 10T Realistic CNTFET Based SRAM
Journal of Nanotechnology
Materials Science
Designing Faster CMOS Sub-Threshold Circuits Utilizing Channel Length Manipulation
