Flexible and High-Efficiency Turbo Product Code Decoder Design

IEICE Electronics Express- Japan

doi 10.1587/elex.9.1044

Full Text

Abstract

Available in

Date

Authors

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Related search

A Flexible LDPC/Turbo Decoder Architecture

Journal of Signal Processing Systems
ControlSystems EngineeringInformation SystemsSignal ProcessingSimulationHardwareArchitectureModelingTheoretical Computer Science
2010English

Ultra-Light Decoder for Turbo Product Codes

IEEE Communications Letters
Electronic EngineeringSimulationComputer Science ApplicationsElectricalModeling
2018Danish

Design Considerations of a Low-Complexity, Low-Power Integer Turbo Decoder

IFIP Advances in Information and Communication Technology
Computer NetworksInformation SystemsManagementCommunications
2002English

EXIT-Chart-Aided Near-Capacity Quantum Turbo Code Design

IEEE Transactions on Vehicular Technology
Electronic EngineeringAutomotive EngineeringComputer NetworksApplied MathematicsCommunicationsElectricalAerospace Engineering
2015English

High-Throughput Contention-Free Concurrent Interleaver Architecture for Multi-Standard Turbo Decoder

2011English

Low Complexity Decoder for CCSDS Turbo Codes

IOSR Journal of Electronics and Communication Engineering
2014English

Memory Optimization of MAP Turbo Decoder Algorithms

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
HardwareElectronic EngineeringElectricalArchitectureSoftware
2001English

High Speed Low-Power Viterbi Decoder Using Trellis Code Modulation

International Journal of Computing Algorithm
2016English

Parallel Interleaver Architecture With New Scheduling Scheme for High Throughput Configurable Turbo Decoder

2013English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2026 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy