Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by Akshay Malhotra
Area Efficient SR Flip-Flop Designed Using 90nm CMOS Technology
International Journal of Advanced Technology and Engineering Exploration
Related publications
A Low Power, High Speed 18-Transitor True Single-Phase Clocking D Flip- Flop Design in 90nm Cmos Technology
International Journal of Innovative Technology and Exploring Engineering
Mechanics of Materials
Electronic Engineering
Civil
Structural Engineering
Electrical
Computer Science
"Flip Flop" Sandals.
BMJ
Review Paper on Power Efficient Hybrid D-Flip Flop
International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering
Efficient Explicit Pulsed Double Edge Triggered Flip-Flop by Using Dependency on Data
IOSR Journal of Electronics and Communication Engineering
Design a 10-Bit 100MHz Pipelined ADC Using RB-OTA in 90nm CMOS Technology
IEICE Electronics Express
Electronic Engineering
Condensed Matter Physics
Optical
Electrical
Magnetic Materials
Electronic
Area Efficient Full Subtractor Based on Static 125nm CMOS Technology
International Journal of Trend in Scientific Research and Development
Flip-Flop Chaining Architecture for Power-Efficient Scan During Test Application
Bilayer Defects Facilitate DPPC Flip-Flop
Biophysical Journal
Biophysics
Power Efficient Design of Semi-Dynamic Master-Slave Single-EdgeTriggered Flip-Flop
International Journal on Electrical Engineering and Informatics
Engineering
