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Publications by I. Kadayif
Optimizing Array-Intensive Applications for On-Chip Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Hardware
Computational Theory
Signal Processing
Architecture
Mathematics
Compiler-Directed Scratch Pad Memory Optimization for Embedded Multiprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware
Electronic Engineering
Electrical
Architecture
Software
Related publications
Optimizing Shared Cache Behavior of Chip Multiprocessors
Photonic Networks-On-Chip for Future Generations of Chip Multiprocessors
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
Optimizing Gold Nanoparticle Cluster Configurations (N≤ 7) for Array Applications
Journal of Physical Chemistry C
Surfaces
Energy
Nanoscience
Theoretical Chemistry
Optical
Magnetic Materials
Films
Nanotechnology
Electronic
Coatings
Physical
Adaptive Zone-Aware Multi-Bank on Chip Last Level L2 Cache Partitioning for Chip Multiprocessors
International Journal of Computer Applications
Author Retrospective for Cooperative Cache Partitioning for Chip Multiprocessors
Software-Hardware Cooperative DRAM Bank Partitioning for Chip Multiprocessors
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors
Performance Modeling of Multithreaded Programs for Mobile Asymmetric Chip Multiprocessors
MFLUSH: Handling Long-Latency Loads in SMT On-Chip Multiprocessors
