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Publications by J. Hoeflinger
An Advanced Compiler Framework for Non-Cache-Coherent Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Hardware
Computational Theory
Signal Processing
Architecture
Mathematics
Automatic Detection of Parallelism: A Grand Challenge for High Performance Computing
IEEE Parallel & Distributed Technology: Systems & Applications
Related publications
Memory Contention in Scalable Cache-Coherent Multiprocessors
Flexible Use of Memory for Replication/Migration in Cache-Coherent DSM Multiprocessors
ACM SIGARCH Computer Architecture News
Hardware and Compiler-Directed Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study
IEEE Transactions on Parallel and Distributed Systems
Hardware
Computational Theory
Signal Processing
Architecture
Mathematics
An Efficient Cache Design for Scalable Glueless Shared-Memory Multiprocessors
Software Cache Coherence for Large Scale Multiprocessors
Author Retrospective for Cooperative Cache Partitioning for Chip Multiprocessors
Compiler-Directed Scratch Pad Memory Optimization for Embedded Multiprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware
Electronic Engineering
Electrical
Architecture
Software
An Advanced Silicon Compiler in Prolog
Optimizing Shared Cache Behavior of Chip Multiprocessors
