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Publications by Mrs.Rashmi Rahul Kulkarni
Parallel Hardware Implementation of Convolution Using Vedic Mathematics
IOSR journal of VLSI and Signal Processing
Related publications
MAC Implementation Using Vedic Multiplication Algorithm
International Journal of Computer Applications
Implementation of 64 Bit Complex Floating-Point Multiplier on FPGA Using Vedic Mathematics Sutra- Urdhva Tiryagbhyam
International Journal of Innovative Technology and Exploring Engineering
Mechanics of Materials
Electronic Engineering
Civil
Structural Engineering
Electrical
Computer Science
Design of an Optimized High Speed Multiplier Using Vedic Mathematics
Contemporary Engineering Sciences
Materials Science
Mutagenesis
Computer Networks
Fluid Flow
Communications
Engineering
Health
Transfer Processes
Toxicology
Social Sciences
BulkSort: System Design and Parallel Hardware Implementation Considerations
International Journal of Advanced Computer Science and Applications
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Design of an Efficient Binary Vedic Multiplier for High Speed Applications Using Vedic Mathematics With Bit Reduction Technique
Circuits and Systems
Implementation of Power Efficient Vedic Multiplier
International Journal of Computer Applications
FSL-based Hardware Implementation for Parallel Computation of cDNA Microarray Image Segmentation
International Journal of Advanced Computer Science and Applications
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Making Nested Parallel Transactions Practical Using Lightweight Hardware Support
Hardware Implementation of Speech Recognition Using MFCC and Euclidean Distance
International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering
