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Publications by P.R. Panda
Low-Power Memory Mapping Through Reducing Address Bus Activity
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware
Electronic Engineering
Electrical
Architecture
Software
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Power-Optimal Encoding for a DRAM Address Bus
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NUMA Obliviousness Through Memory Mapping
Multithreshold Voltage Technology for Low Power Bus Architecture
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Reducing Memory Space Consumption Through Dataflow Analysis
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Universal Rotate Invert Bus Encoding for Low Power VLSI
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An Implementation of Low Latency Address-Mapping Logic for SSD Controllers
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Crosstalk-Noise-Aware Bus Coding With Low-Power Ground-Gated Repeaters
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