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Publications by Said Hamdioui
System-Level Sub-20 Nm Planar and FinFET CMOS Delay Modelling for Supply and Threshold Voltage Scaling Under Process Variation
Journal of Low Power Electronics
Electronic Engineering
Electrical
Parallel Matrix Multiplication on Memristor-Based Computation-In-Memory Architecture
Automated DfT Insertion and Test Generation for 3d-SICs With Embedded Cores and Multiple Towers
Testing Computation-In-Memory Architectures Based on Emerging Memories
Reliability Modeling and Mitigation for Embedded Memories
Device-Aware Test: A New Test Approach Towards DPPB Level
Memristive Devices: Technology, Design Automation and Computing Frontiers
BTI Impact on Logical Gates in Nano-Scale CMOS Technology
PPM Reduction on Embedded Memories in System on Chip
12th IEEE European Test Symposium (ETS'07)
