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Publications by Sang-Dae Yu
Design of CMOS Op Amps Using Adaptive Modeling of Transistor Parameters
Journal of Semiconductor Technology and Science
Electronic Engineering
Optical
Electrical
Magnetic Materials
Electronic
Related publications
Subthreshold CMOS Logic Design Using Parallel Transistor Stacks
Achieving Rail-To-Rail Input Operation Using Level-Shift Multiplexing Technique for All CMOS Op-Amps
Automated Design of Folded-Cascode Op-Amps With Sensitivity Analysis
Investigation of a New Technique for Adaptive Cancellation of Noise in MOSFET Op. Amps.
Journal of King Abdulaziz University-Engineering Sciences
Designing Faster CMOS Subthreshold Circuits Using Transistor Sizing and Paralled Transistor Stacks
Delay Analysis of Half Subtractor Using CMOS and Pass Transistor Logic
International Journal of Computer Applications
Design of Low Power High Speed D-Latch Using Stacked Inverter and Sleep Transistor at 32nm CMOS Technology
International Journal of Trend in Scientific Research and Development
Optimizing CMOS Circuits for Low Power Using Transistor Reordering
Application of Adaptive Neuro-Fuzzy Inference System for Predictaion of HEMT Transistor Noise Parameters
International Journal of Modeling and Optimization
