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Publications by T. Iwamatsu
Evaluation of Threshold-Voltage Variation in Silicon on Thin BOX (SOTB) CMOS and Its Impact on Decreasing Standby Leakage Current
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Impact of Gate Induced Drain Leakage on Overall Leakage of Submicrometer CMOS VLSI Circuits
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Impact of Gate-Length Biasing on Threshold-Voltage Selection
Analysis of the Effect of Temperature Variations on Sub-Threshold Leakage Current in P3 and P4 SRAM Cells at Deep Sub-Micron CMOS Technology
International Journal of Computer Applications
Modelling and Optimization of Subthreshold Leakage Current in Low-Power, Silicon-Based, Complementary Metal Oxide Semiconductor (Cmos) Devices
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Techniques for Sub-Threshold Leakage Reduction in Low Power CMOS Circuit Designs
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Threshold Voltage and Power-Supply Tolerance of CMOS Logic Design Families
Runtime Mechanisms for Leakage Current Reduction in CMOS VLSI Circuits
