Amanote Research

Amanote Research

    RegisterSign In

Discover open access scientific publications

Search, annotate, share and cite publications


Publications by Vishwanadh Tirumalashetty

Clock Gating and Negative Edge Triggering for Energy Recovery Clock

2007English

Related publications

Multiwavelength All-Optical Clock Recovery

IEEE Photonics Technology Letters
Electronic EngineeringOpticsMolecular Physics,OpticalElectricalAtomicMagnetic MaterialsElectronic
1999English

Power Reduction Through Clock Gating by Symbolic Manipulation

1997English

A Molecular Mechanism for Circadian Clock Negative Feedback

Science
MultidisciplinaryPhilosophy of ScienceHistory
2011English

All-Digital Clock and Data Recovery Architectures

English

Energy-Efficient High-Level Synthesis for HDR Architectures With Clock Gating Based on Concurrency-Oriented Scheduling

IPSJ Transactions on System LSI Design Methodology
Electronic EngineeringComputer Science ApplicationsElectrical
2013English

A Novel Sequential Circuit Optimization With Clock Gating Logic

2008English

Design Considerations for High Speed Clock and Data Recovery Circuits

English

Analysis of Bang-Bang Clock and Data Recovery

English

Solutions for Ultra-High Speed Optical Wavelength Conversion and Clock Recovery

2006English

Amanote Research

Note-taking for researchers

Follow Amanote

© 2025 Amaplex Software S.P.R.L. All rights reserved.

Privacy PolicyRefund Policy