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Publications by A. Pradzynski

Impact of Gate Induced Drain Leakage on Overall Leakage of Submicrometer CMOS VLSI Circuits

IEEE Transactions on Semiconductor Manufacturing
Electronic EngineeringIndustrialCondensed Matter PhysicsManufacturing EngineeringOpticalElectricalMagnetic MaterialsElectronic
2002English

Related publications

Design Techniques for Gate-Leakage Reduction in CMOS Circuits

English

Runtime Mechanisms for Leakage Current Reduction in CMOS VLSI Circuits

English

Simultaneous Control of Subthreshold and Gate Leakage Current in Nanometer-Scale CMOS Circuits

2007English

An Algorithm for Leakage Power Reduction Through IVC in CMOS VLSI Digital Circuits

International Journal of Computer Applications
2014English

Leakage Current in Deep-Submicron Cmos Circuits

Journal of Circuits, Systems and Computers
HardwareElectronic EngineeringElectricalArchitecture
2002English

Failure Analysis Using IDD Current Leakage and Photo Localization for Gate Oxide Defect of CMOS VLSI

2010English

A Gate-Level Leakage Power Reduction Method for Ultra-Low-Power CMOS Circuits

English

Interface Trap Effect on Gate Induced Drain Leakage Current in Submicron N-MOSFET's

IEEE Transactions on Electron Devices
Electronic EngineeringOpticalElectricalMagnetic MaterialsElectronic
1994English

Gate Leakage Reduction by Clocked Power Supply of Adiabatic Logic Circuits

Advances in Radio Science
2005English

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