Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by David Skoll
Delay and Power Macro-Models for Optimizing ECL Circuits.
Related publications
Optimizing CMOS Circuits for Low Power Using Transistor Reordering
Optimizing Power Consumption, Area, and Delay in Behavioral Synthesis.
Cycle-Accurate Macro-Models for RT-level Power Analysis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware
Electronic Engineering
Electrical
Architecture
Software
Cycle-Accurate Macro-Models for RT-level Power Analysis
Power and Delay Comparison of Binary and Quaternary Arithmetic Circuits
Design, Modeling, and Optimization of ECL Interface Circuits for BiCMOS Integrated Systems.
Electronically Controllable Delay Circuits
The Journal of the Institute of Television Engineers of Japan
A Joint Gate Sizing and Buffer Insertion Method for Optimizing Delay and Power in CMOS and BiCMOS Combinational Logic
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Optimizing Large Multiphase Level-Clocked Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
