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Publications by M. F. Siddiqui
Investigation of a Novel Common Subexpression Elimination Method for Low Power and Area Efficient DCT Architecture
The Scientific World Journal
Biochemistry
Medicine
Genetics
Molecular Biology
Environmental Science
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A Novel Scan Architecture for Power-Efficient, Rapid Test
IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
Computer Science Applications
Computer Graphics
Computer-Aided Design
Software
Design of Adaptive Communication Channel Buffers for Low-Power Area-Efficient Network-On-Chip Architecture
Power and Area Efficient Radix-8 Booth Multiplier for 2-D DWT Architecture
International Journal of Intelligent Engineering and Systems
Engineering
Computer Science
Performance Analysis of High Efficient and Low Power Architecture for Fuzzy Based Image Fusion
American Journal of Applied Sciences
Multidisciplinary
Double-Tree Scan: A Novel Low-Power Scan-Path Architecture
A Novel Low Power Adder-Subtractor Using Efficient XOR Gates
Journal of Applied Sciences
Reconfigurable and Versatile Bilrc Architecture Design With an Area and Power Efficient Technique
International Journal of Research in Engineering and Technology
Novel Approaches to Low Leakage and Area Efficient VLSI Design
Power Efficient and Secure IPV6 Robust Header Compression Technique for Low Power Wireless Personal Area Networks
International Journal of Computer Applications