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Publications by Mr. Pradeep Kumar Reddy
A Dynamic Scratchpad Memory Collaborated With Cache Memory for Transferring Data for Multi-Bit Error Correction
International Journal of Trend in Scientific Research and Development
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Bit Error Generation for NAND Flash Memory
WCET-aware Data Selection and Allocation for Scratchpad Memory
Investigation of Scratchpad Memory for Preemptive Multitasking
CRISP: A Pipelined 32-Bit Microprocessor With 13-Kbit of Cache Memory
IEEE Journal of Solid-State Circuits
Electronic Engineering
Electrical
Reducing Cache Power With Low-Cost, Multi-Bit Error-Correcting Codes
ACM SIGARCH Computer Architecture News
Reducing Cache Power With Low-Cost, Multi-Bit Error-Correcting Codes
A Shared Scratchpad Memory With Synchronization Support
Design of Cache Memory With Cache Controller for Low Power
Crosstalk Aware Multi-Bit Error Detection With Limited Error Correction Coding for Reliable On-Chip Communication
International Journal of Computer Applications
