Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by Poona Bahrebar
Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits
VLSI Design
Electronic Engineering
Computer Graphics
Hardware
Electrical
Architecture
Computer-Aided Design
Related publications
Optimizing CMOS Circuits for Low Power Using Transistor Reordering
Limited Switch Dynamic Logic Circuits for High-Speed Low-Power Circuit Design
IBM Journal of Research and Development
Computer Science
Development of High-Speed and Low-Power Microprocessors Using Superconductive Circuits
IEEJ Transactions on Fundamentals and Materials
Electronic Engineering
Electrical
Designing Faster CMOS Subthreshold Circuits Using Transistor Sizing and Paralled Transistor Stacks
Stabilized DC High Voltage Power Supply Using Transistor Circuits
Journal of the Atomic Energy Society of Japan / Atomic Energy Society of Japan
Speed of Simple Arithmetic in Bilinguals
Memory and Cognition
Arts
Neuropsychology
Cognitive Psychology
Humanities
Physiological Psychology
Medicine
Experimental
High-Efficiency Low-Power Flash ADC for High-Speed Transceivers
CVR Journal of Science & Technology
Transistor Sizing for Radiation Hardening
Design of Low Power High Speed D-Latch Using Stacked Inverter and Sleep Transistor at 32nm CMOS Technology
International Journal of Trend in Scientific Research and Development
