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Publications by R.-J. YANG
A Fully Integrated 1.7-3.125 GBPS Clock and Data Recovery Circuit Using a Gated Frequency Detector
IEICE Transactions on Electronics
Electronic Engineering
Optical
Electrical
Magnetic Materials
Electronic
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Tradeoffs in Design of Low-Power Gated-Oscillator Clock and Data Recovery Circuits
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CMOS Building Blocks for 10+Gb/S Clock Data Recovery Circuit
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