Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by Sep Seyedi
Functional Fault Equivalence and Diagnostic Test Generation in Combinational Logic Circuits Using Conventional ATPG
Journal of Electronic Testing: Theory and Applications (JETTA)
Electronic Engineering
Electrical
Related publications
Functional Test Generation Using Constraint Logic Programming
IFIP Advances in Information and Communication Technology
Computer Networks
Information Systems
Management
Communications
Fourier Analysis-Based Automatic Test Pattern Generation for Combinational Circuits
Reducibility of Sequential Test Generation to Combinational Test Generation for Several Delay Fault Models
ATPG for Delay Defects in Current Mode Threshold Logic Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
The Mechanical Generation of Fault Trees for Reactive Systems via Retrenchment I: Combinational Circuits
Formal Aspects of Computing
Theoretical Computer Science
Software
On the Use of Evolutionary Programming for Combinational Logic Circuits Design
Lecture Notes in Computer Science
Computer Science
Theoretical Computer Science
Robust Flip-Flop Against Soft Errors for Combinational and Sequential Logic Circuits
Multiple-Fault Diagnosis Based on Adaptive Diagnostic Test Pattern Generation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Electrical
Software
Computer Graphics
Computer-Aided Design
Electronic Engineering
Ring Counter Based ATPG for Low Transition Test Pattern Generation
The Scientific World Journal
Biochemistry
Medicine
Genetics
Molecular Biology
Environmental Science
