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Publications by Alex Orailoglu
A Novel Scan Architecture for Power-Efficient, Rapid Test
IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
Computer Science Applications
Computer Graphics
Computer-Aided Design
Software
Predictable Execution Adaptivity Through Embedding Dynamic Reconfigurability Into Static MPSoC Schedules
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Flip-Flop Chaining Architecture for Power-Efficient Scan During Test Application
Double-Tree Scan: A Novel Low-Power Scan-Path Architecture
Power Reduction in Test-Per-Scan BIST With Supply Gating and Efficient Scan Partitioning
IPStash: A Power-Efficient Memory Architecture for IP-lookup
Investigation of a Novel Common Subexpression Elimination Method for Low Power and Area Efficient DCT Architecture
The Scientific World Journal
Biochemistry
Medicine
Genetics
Molecular Biology
Environmental Science
On Minimization of Peak Power for Scan Circuit During Test
A Novel Architecture for Efficient Key Management in Humanware Applications
On the Power for Linkage Detection Using a Test Based on Scan Statistics
Biostatistics
Medicine
Uncertainty
Statistics
Probability
Stacked FSMD: A Power Efficient Micro-Architecture for High Level Synthesis