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Publications by KUMAR GANAPATHY

Optimal Synthesis of Processor Arrays With Pipelined Arithmetic Units

Parallel Processing Letters
HardwareTheoretical Computer ScienceArchitectureSoftware
1994English

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Optimal Processor Assignment for a Class of Pipelined Computations

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The Reconfigurable Arithmetic Processor

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A Digit Pipelined Dynamic Time Warp Processor.

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Jacobi-Specific Processor Arrays

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CORDIC Arithmetic for an SVD Processor

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Efficient Pipelined Broadcast With Monitoring Processing Node Status on a Multi-Core Processor

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A Fault-Tolerant Permutation Network Modulo Arithmetic Processor

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Design and Implementation of a Ultra-High-Speed Pipelined FFT Processor

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