Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by Ku. Priyanka M. Raut
Low Power Mix Logic Design Using Line Decoder: A Review
International Journal of Trend in Scientific Research and Development
Related publications
An Efficient Low Power Viterbi Decoder Design Using T-Algorithm
International Journal of Computer Applications
Design and Simulation of a Low Power Viterbi Decoder Using Constraint Length Nine
International Journal of Computer Applications
Design Considerations of a Low-Complexity, Low-Power Integer Turbo Decoder
IFIP Advances in Information and Communication Technology
Computer Networks
Information Systems
Management
Communications
High Speed Low-Power Viterbi Decoder Using Trellis Code Modulation
International Journal of Computing Algorithm
CMOS VLSI Design of Low Power Comparator Logic Circuits
Asian Journal of Scientific Research
Multidisciplinary
Low Power-Area Design of Full Adder Using Self Resetting Logic With GDI Technique
SSRN Electronic Journal
Design of Low Power Barrel Shifter and Rotator Using Two Phase Clocked Adiabatic Static Cmos Logic
International Journal of Research in Engineering and Technology
Low-Power Design of Adiabatic Dynamic CMOS Logic Using Parasitic Capacitance of 0.18μm Standard CMOS Model
Design of Low Power SRAM Using Hierarchical Divided Bit-Line Approach in 180-Nm Technology
International Journal of Engineering Research and