Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by D.Sivaranjani .
High Performance Low Leakage Power Full Subtractor Circuit Design Using Rate Sensing Keeper
International Journal of Research in Engineering and Technology
Related publications
Modified Keeper Controlled Domino Circuit for Low Power High Performance Wide Fan in OR Gates
International Journal of Engineering and Advanced Technology
Engineering
Computer Science Applications
Environmental Engineering
Design a Low Power Half-Subtractor Using .90µm CMOS Technology
IOSR journal of VLSI and Signal Processing
Minimizing Power Consumption in CMOS Full Subtractor Using SVL Technique
International Journal of Computer Applications
A Novel Design of SET-CMOS Half Subtractor and Full Subtractor
International Journal of Computer Applications
Double-Gate Fully-Depleted SOI Transistors for Low-Power High-Performance Nano-Scale Circuit Design
Low Power Magnitude Comparator Circuit Design
International Journal of Computer Applications
A Novel Low Power Adder-Subtractor Using Efficient XOR Gates
Journal of Applied Sciences
Leakage Power Reduction by Using Sleep Switches in Domino Logic Circuit Design in DSM Technology
International Journal of Computer Applications
Limited Switch Dynamic Logic Circuits for High-Speed Low-Power Circuit Design
IBM Journal of Research and Development
Computer Science