Amanote Research
Register
Sign In
Discover open access scientific publications
Search, annotate, share and cite publications
Publications by G. Hemanth Kumar
Area Efficient Full Subtractor Based on Static 125nm CMOS Technology
International Journal of Trend in Scientific Research and Development
Related publications
A Novel Design of SET-CMOS Half Subtractor and Full Subtractor
International Journal of Computer Applications
Minimizing Power Consumption in CMOS Full Subtractor Using SVL Technique
International Journal of Computer Applications
Design a Low Power Half-Subtractor Using .90µm CMOS Technology
IOSR journal of VLSI and Signal Processing
Area Efficient SR Flip-Flop Designed Using 90nm CMOS Technology
International Journal of Advanced Technology and Engineering Exploration
Optimized CMOS Design of Full Adder Using 45nm Technology
International Journal of Computer Applications
A Low-Voltage and Energy-Efficient Full Adder Cell Based on Carbon Nanotube Technology
Nano-Micro Letters
Surfaces
Electronic Engineering
Nanoscience
Optical
Electrical
Magnetic Materials
Films
Nanotechnology
Electronic
Coatings
A High-Efficient Low-Voltage Rectifier for CMOS Technology
Metrology and Measurement Systems
Delay Analysis of Half Subtractor Using CMOS and Pass Transistor Logic
International Journal of Computer Applications
Hazards and Glitch Power Reduction of CMOS Full Adder in 90nm Technology
CVR Journal of Science & Technology
