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Publications by Taichi OGAWA

Threshold-Logic Devices Consisting of Subthreshold CMOS Circuits

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Electronic EngineeringComputer GraphicsSignal ProcessingApplied MathematicsElectricalComputer-Aided Design
2009English

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Subthreshold CMOS Logic Design Using Parallel Transistor Stacks

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Performance Analysis of High Speed Domino CMOS Logic Circuits

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Technology Mapping Algorithms for CMOS Dynamic Logic Circuits.

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CMOS VLSI Design of Low Power Comparator Logic Circuits

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Logic Testing of Bridging Faults in CMOS Integrated Circuits

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CMOS-based Carbon Nanotube Pass-Transistor Logic Integrated Circuits

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Designing Faster CMOS Subthreshold Circuits Using Transistor Sizing and Paralled Transistor Stacks

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Simultaneous Control of Subthreshold and Gate Leakage Current in Nanometer-Scale CMOS Circuits

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Designing Faster CMOS Sub-Threshold Circuits Utilizing Channel Length Manipulation

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