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Publications by Tetsuya HIROSE
Threshold-Logic Devices Consisting of Subthreshold CMOS Circuits
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Electronic Engineering
Computer Graphics
Signal Processing
Applied Mathematics
Electrical
Computer-Aided Design
Related publications
Subthreshold CMOS Logic Design Using Parallel Transistor Stacks
Performance Analysis of High Speed Domino CMOS Logic Circuits
International Journal of Computer Applications
Technology Mapping Algorithms for CMOS Dynamic Logic Circuits.
CMOS VLSI Design of Low Power Comparator Logic Circuits
Asian Journal of Scientific Research
Multidisciplinary
Logic Testing of Bridging Faults in CMOS Integrated Circuits
IEEE Transactions on Computers
Hardware
Architecture
Mathematics
Computational Theory
Theoretical Computer Science
Software
CMOS-based Carbon Nanotube Pass-Transistor Logic Integrated Circuits
Nature Communications
Astronomy
Genetics
Molecular Biology
Biochemistry
Chemistry
Physics
Designing Faster CMOS Subthreshold Circuits Using Transistor Sizing and Paralled Transistor Stacks
Simultaneous Control of Subthreshold and Gate Leakage Current in Nanometer-Scale CMOS Circuits
Designing Faster CMOS Sub-Threshold Circuits Utilizing Channel Length Manipulation
